★Logic Circuit Design Engineer | Listed AI Company
- Business Level Japanese Required
◆ Flextime System
◆ Listed Company
◆ International Environment
◆ Annual salary: 5 million yen - 10 million yen
【About the company】
The company was launched in July 2002 as a venture company originating from Hosei University.
Since then, the company has been operating with graphics technology as its core business, and currently provides consistent AI solutions from algorithm software to hardware or from edge to cloud in three businesses: IP core license business, product business, and professional service business.
【 Job Description】
You'll be responsible for ASIC development, including RTL design for in-house hardware IPs like AI and image processors, as well as SoC architecture design.
・Design AI and Image Processors: You'll develop hardware IPs for AI and image processors at the logic level. Using design languages like Verilog and SystemVerilog, you'll create high-performance, low-power optimized designs.
・Design SoC Architecture: You'll integrate multiple IPs to create a complete architectural design that combines CPU cores, memory, and interfaces.
・ASIC Design and Development: You'll advance chip design from specification and micro-architecture to logic design.
・Team Collaboration: You'll work with software development teams and external partners to improve designs and enhance performance.
■Recruitment Background
The company is expanding its team of ASIC frontend engineers due to an increase in demand for semiconductor product development.
■About the Team
You'll be part of the Hardware Development Group within the Development Division.
■Position Highlights
・You'll find fulfillment in seeing the products you worked on released to the world.
・You'll have the opportunity to improve your hardware development skills.
・The company's in-house development of both hardware and software allows you to acquire a wide range of knowledge.
・You'll get to work on the development of AI processors.
【 Requirements】
【Required】
・7+ years of hands-on experience in hardware IP design, SoC architecture design, and ASIC design using RTL
・Knowledge and hands-on experience in logic synthesis, timing closure, and PPA (Power, Performance, Area) optimization
・Hands-on experience with basic software programming in C, C++, Python, shell scripts, etc., for verification efficiency
【Preferred】
・Experience developing cutting-edge SoCs requiring high-speed processing of massive computations such as AI, GPU, image processing, and video decoders
・Experience developing hardware IP for high-speed algorithm processing
・Knowledge and experience with interconnects and bus architectures
・Verification utilizing emulators and FPGAs (including OS and test program development)
・Knowledge and experience with high-speed interfaces such as DRAM, PCI Express, USB, HDMI, DisplayPort, and MIPI
・Experience with asynchronous path verification, assertion-based verification, and formal verification
・Knowledge and experience with DFT (BIST, SCAN)
・Experience negotiating requirements specifications and explaining development deliverables with overseas customers
【Other】
・Experience in autonomously planning work, experience in mentoring other engineers
【Ideal Applicants】
・Excited about LSI development using cutting-edge processes
・Interested in and enthusiastic about acquiring skills in new technologies
・Proactively engaged in activities to effectively communicate R&D results to customers
【Working Time 】
Flextime System
【 Welfare 】
Defined Contribution Pension Plan
Kanto IT Software Health Insurance Association
Benefit Station (over 800 e-learning courses, discounts on movies, travel, etc.)
Employee Stock Ownership Plan (20% incentive)
Stock compensation system
Awards system, etc.
【Holidays and Vacations】
Paid leave *Number of days granted varies depending on the time of entry into the company in the first year
Two days off per week (Saturdays and Sundays), national holidays, year-end and New Year holidays,
Summer vacation (3 days), parental leave, congratulation or condolence leave
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