Electronic Design Engineer

13時間前

Aichi MARUWA CO., LTD.

Title:
IC Packaging / Substrate Development Engineer

We are seeking a highly skilled IC Packaging / Substrate Development Engineer to support advanced package development, substrate technology innovation, and New Product Introduction (NPI) for next‑generation semiconductor products.

The ideal candidate will have hands‑on experience with FCBGA, FCCSP, 2.xD/3D IC, RDL, CoWoS‑related technologies, and substrate design rules, combined with strong cross‑functional leadership in high‑volume manufacturing environments.

Key Responsibilities:

Advanced Packaging Development

-Lead planning, design, and development of advanced IC packages (FCBGA, FCCSP, Chiplet, 2.xD/3D IC, CoWoS‑related structures).

-Define package architecture, material stack‑up, and design rules for next‑generation products.

-Drive substrate technology development including RDL, CoWoP PCB, fine‑line routing, and high‑density interconnect structures.

-New Product Introduction (NPI)

Manage end‑to‑end NPI cycles from pathfinding and test vehicle development to mass production.

-Coordinate with cross‑functional teams (Process, FA, Test, Design, OSAT) to ensure on‑time delivery and technical readiness.

-Conduct DFM reviews, tooling validation, and risk assessments to prevent yield loss and ensure manufacturability.

-Process Integration & Yield Improvement

Lead process integration activities including assembly setup, process optimization, and DOE execution.

-Identify root causes of yield issues and drive corrective and preventive actions.

-Monitor CTQ/IPP parameters and ensure compliance with quality and reliability standards.

Substrate & Material Engineering:

-Maintain and update substrate design rules, specifications, and technology roadmaps.

-Evaluate new materials, plating chemistries, and process capabilities (Cu plating, via filling, RDL formation, etc.).

-Collaborate with substrate vendors to qualify new technologies and improve performance.

-Cross‑Functional & Customer Engagement

-Serve as a technical interface for global customers, presenting yield status, DOE results, and technical solutions.

-Support OSAT partners for mass production, quality improvement, and cost optimization.

-Provide technical leadership and mentorship to junior engineers.

Qualifications:

Required

-Bachelor's or Master's degree in Electrical Engineering, Materials Science, Chemical Engineering, or related field.

-3+ years of hands‑on experience in IC packaging, substrate development, or advanced packaging NPI.

-Strong knowledge of FCBGA, FCCSP, RDL, 2.xD/3D IC, or CoWoS‑related technologies.

-Proven experience in DOE, FA, process integration, and yield improvement.

-Familiarity with substrate design rules, PCB/RDL manufacturing, and material evaluation.

-Excellent communication skills and ability to lead cross‑functional teams.

  • Knowledge of Japanese at least JLPT1

Preferred

-Experience with high‑density substrate technologies (2.xD RDL, fine‑line Cu plating, via filling).

-Customer‑facing experience with global semiconductor clients.

-Proficiency with JMP, AutoCAD, or similar engineering tools.

Key Competencies

-Strong analytical and problem‑solving skills

-Ability to manage multiple high‑risk NPI programs

-Cross‑functional leadership and stakeholder management

-Innovation mindset and continuous improvement orientation

-Clear communication and technical presentation skills

募集要項:
シニア IC パッケージ開発エンジニア

職務概要

当社では、半導体パッケージの開発やサブストレート技術の向上、新製品の立ち上げ(NPI)を担当いただけるエンジニアを募集しています。

FCBGA、FCCSP、Chiplet、2.xD/3D IC、RDL、CoWoS などの先端パッケージ技術に関する経験をお持ちの方を歓迎します。

量産までの一連の流れを、関係部署と協力しながら進めていただくポジションです。

主な仕事内容

先端パッケージの開発

・FCBGA、FCCSP、Chiplet、2.xD/3D IC などのパッケージ設計・開発

パッケージ構造や材料構成、設計ルールの検討・改善

・RDL やサブストレート(基板)技術の開発・評価

新製品立ち上げ(NPI)

・試作から量産移管までのスケジュール管理と技術対応

・プロセス、品質、テスト、設計など社内外の関係部署との調整

・DFM(量産性の確認)やツール・治具の確認、リスク評価の実施

プロセス改善・歩留まり向上

・組立プロセスの立ち上げ、条件出し、DOE(実験計画)の実施

・不良原因の調査と対策の推進

・品質・信頼性に関わる重要項目(CTQ)の管理

サブストレート・材料技術

・サブストレートの設計ルールや仕様書の作成・更新

・新材料やめっき技術、RDL 技術の評価

・サプライヤーとの技術打合せや量産導入のサポート

顧客対応・社内調整

・顧客への技術説明、歩留まり状況や改善内容の報告

・OSAT との量産サポートや品質改善活動

・若手エンジニアの育成・技術指導

応募資格

必須条件:

・電気・材料・化学などの工学系学位

・半導体パッケージ、サブストレート開発、または NPI の実務経験(2年以上)

・FCBGA、FCCSP、RDL、2.xD/3D IC、CoWoS などの技術経験

・DOE、FA、プロセス改善、歩留まり向上の経験

・パッケージ設計や基板製造プロセスの理解

・部門間調整や顧客対応ができるコミュニケーション力

歓迎条件

・高密度パッケージ(微細配線、ビアフィルなど)の経験

・海外顧客との技術折衝経験

・JMP、AutoCAD などのツール使用経験

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