Implement ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements Verify Logic at ISP level and Digital System level Optimize Design for less gate count and low powe ...

Implement ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) and define ISP HW Architecture based on product features and performance requirements. · ...

· Analog Design Engineer will develop next generation CMOS Image Sensors working for future technologies not only analog circuits design but also circuits architecture new structure and new device. · Good communication and interpersonal skills · ...

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Digital Design engineer: Senior staff engineer for RTL design and verification using Verilog and System Verilog. · ...

品質エンジニアとして医療機器の開発、調達、製造、サービスプロセスにおいて品質代表として参画し、グローバル規制に適合した品質保証活動をリードします。 · 新製品開発、調達、製造、サービスにおける品質エンジニアリングのリード · 割り当てられた品質エンジニアリングタスクの遂行(スケジュール遵守) · 品質および規制要求に関する社内啓発の推進 · 工程・手順の開発および改訂の主導 · SPC(統計的プロセス管理)を適用したプロセス評価 · 問題解決に向けた新たなアプローチの開発 · FDA、ISO13485 等、グローバル規格の遵守および維持 · バリデーショ ...

Analog Design Engineer will develop next generation CMOS Image Sensors as R&D engineer working for future technologies not only analog circuits design but also circuits architecture new structure and new device. · Define System Architecture of array readout circuit based on produ ...

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We are seeking a Senior staff engineer to join our team as a Digital Design engineer. The successful candidate will be responsible for RTL design and verification using Verilog and System Verilog, defining system architecture, working closely with analog design engineers, impleme ...

As an Application engineer for CIS, you will be responsible to conduct analytic studies of fundamental performance issues for CIS or ISP and provide technical suggestions of improvement. · ...

Job summaryConduct analytic studies of fundamental performance issues for CIS or ISP and provide technical suggestions of improvement. · Support customer and solve their issue with close communication and lead the product to mass production · ...

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Technical Leadership Role to develop Chip top design thoroughly from specification, design verification production support. · ...

As Digital Design Engineer, · responsible for RTL design and verification using Verilog · and System Verilog. · ...

As Digital Design Engineer responsible for RTL design and verification using Verilog and System Verilog define system architecture based on product features performance requirements gate count power estimation. · ...

Digital design engineer for MidSize DDIC or TDDI (Touch and display development Integration) · Design and develop digital circuit for automotive and notebook TDDI · Define specifications and evaluate architecture/performance · ...

Analog design engineer for MidSize DDIC or TDDI (Touch and display development Integration) · ...

+At Agoda we bridge the world through travel Our story began in 2005 when two lifelong friends and entrepreneurs driven by their passion for travel launched Agoda to make it easier for everyone to explore the world Today we are part of Booking Holdings NASDAQ BKNG with a diverse ...

We're now seeking a senior/staff-level backend developer to join our team. · We increased revenue 10x over the past year and plan to do the same again over the coming 12 months, · so this is a unique opportunity to experience the early stage of a growing startup. ...

We're an ambitious group distilling our experience to build exactly what we know you need to get from 0 to fluency in a language. · Act as senior/staff engineer in a team of ~4 backend engineers interacting frequently with the broader engineering team · Develop client- and server ...

We are seeking a senior/staff-level backend developer to join our team. Already at 10k+ users, we are scaling quickly, and looking for a strong engineer to support this growth. · Act as senior/staff engineer in a team of ~4 backend engineers... · ...